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NASA will design next generation of high-performance aerospace computing (HPSC) chips

National Aeronautics and Space Administration (NASA) announced today that it will work with Microchip to design the next generation of high-performance aerospace computing (HPSC) chips, claiming that the computing performance will be 100% of the current aerospace computing chips.

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NASA says this critical capability will advance all types of future space missions, from planetary exploration to missions to the moon and Mars. The microchip will build, design, and deliver the HPSC chip within three years, with the goal of flying on future lunar and planetary exploration missions. Microchip’s chip architecture will make computing power scalable according to task demands, thereby increasing the overall computing efficiency of the task. The design will also be more reliable and more fault tolerant.

NASA has learned that the chip will enable spacecraft computers to perform calculations 100 times faster than today’s most advanced spacecraft computers. As part of NASA’s ongoing commercial collaboration efforts, the two parties signed a $ 50 million fixed-price contract, with Microchip providing substantial research and development costs to complete the project.

Wesley Powell, NASA’s chief technologist for advanced avionics, said their current spacecraft computers were developed nearly 30 years ago, and while they have performed well on past missions, future NASA missions will require significant increases in onboard computing power and reliability.

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